Développement de circuits logiques programmables résistants aux alas logiques en technologie CMOS submicrométrique

The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Most of the microelectronics components developed for the first generation of LHC experiments have been designed with very precise experiment-specific goals and are hardly adaptable to other applications. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust programmable components for application in High Energy Physics (HEP) experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 micron CMOS technology. The FPGA under development is instead a 32x32 logic block array, equivalent to ~25k gates, in 0.13 micron CMOS. This work focussed also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design

Design of two digital radiation tolerant integrated circuits for high energy physics experiments data readout

High Energy Physics research (HEP) involves the design of readout electron- ics for its experiments, which generate a high radiation ¯eld in the detectors. The several integrated circuits placed in the future Large Hadron Collider (LHC) experiments' environment have to resist the radiation and carry out their normal operation. In this thesis I will describe in detail what, during my 10-months partic- ipation in the digital section of the Microelectronics group at CERN, I had the possibility to work on: - The design of a radiation-tolerant data readout digital integrated cir- cuit in a 0.25 ¹m CMOS technology, called \the Kchip", for the CMS preshower front-end system. This will be described in Chapter 3. - The design of a radiation-tolerant SRAM integrated circuit in a 0.13 ¹m CMOS technology, for technology radiation testing purposes and fu- ture applications in the HEP ¯eld. The SRAM will be described in Chapter 4. All the work has carried out under the supervision and with the help of Dr. Kostas Kloukinas and the section leader Dr. Alessandro Marchioro

The TDCPix ASIC: Tracking for the NA62 GigaTracker

The TDCPix is a hybrid pixel detector readout ASIC designed for the NA62 GigaTracker detec- tor. The asynchronously operating pixel array consists of 1800 pixels, each 300x300 m m 2 . The requirements are a single-hit timing resolution better than 200 ps RMS and a read-out efficiency of 99% or better in the presence of a beam rate between 800 MHz and 1 GHz . The discrimina- tor time walk effect is compensated by time-over-threshold discriminators connected to an array of 360 dual TDC channels. The TDCpix processes up to 210 Mhits = s and provides the hit data without the need of a trigger in a continuous data stream via four 3.2 Gb = s serialisers. Under test since January 2014, the TDCPix chip is fully functional and shows excellent performance

The VFAT3-Comm-Port: A complete communication port for front-end ASICs intended for use within the high luminosity radiation environments of the LHC

This paper presents the VFAT3 Comm-Port (V3CP), which offers a single port for all communication to and from a front-end ASIC within the HL-LHC environment. This includes synchronization to the LHC clock, slow control communication, the execution of fast control commands and the readout of data.SCOPUS: ar.jinfo:eu-repo/semantics/publishe

GigaTracker, the NA62 Beam Tracker

The GigaTracker measures the momentum, the direction and the crossing time of all the NA62 secondary beam particles. It is composed of three hybrid silicon pixel stations and four achromatic magnets. All the stations have a rate capability above 750 MHz, a single hit time resolution better than 200 ps and a thickness less than 0.5 % of X = X 0 . The stations’ sensor is read out by ten custom TDCpix ASICs. An innovative microchannel cooling solution is used to keep the sensor temperature below 0 °C. The stations are operated in vacuum and are easily swappabl

GigaTracker, a Thin and Fast Silicon Pixels Tracker

GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setup and during a test beam. The time resolution was found to be better than 175 ps, well within the specification

Operational experience with the NA62 Gigatracker

The Gigatracker is a hybrid silicon pixel detector developed for the NA62 experiment at CERN, which aims at measuring the branching fraction of the ultra-rare kaon decay K + → π + ν ν at the CERN SPS. The detector has to track particles in a 75 GeV/c hadron beam with a flux reaching 1.3 MHz/mm 2 and provide single-hit timing with better than 200 ps r.m.s. resolution for a total material budget of less than 0.5% X 0 per station. The tracker comprises three 61 × 27 mm 2 stations installed in vacuum (about 10 − 6 mbar) and cooled with liquid C 6 F 14 circulating through micro- channels etched inside few hundred of microns thick silicon plates. Each station is composed of a 200 μ m thick planar silicon sensor bump-bonded to 2 × 5 custom 100 μ m thick ASIC, called TDCpix. Each chip contains 40 × 45 asynchronous pixels, each 300 × 300 μ m 2 and is instrumented with 720 time-to-digital converter channels with 100 ps bin. In order to cope with the high rate, the TDCpix is equipped with four 3.2 Gb/s serializers sending out the data. Detector description, operational experience and results from the NA62 experimental runs will be presented

The Gigatracker of the NA62 experiment at CERN

NA62 is a fixed-target experiment at the CERN SPS designed to measure the branching ratio of the very rare kaon decay $K^{+} \rightarrow \pi^{+}\nu \bar{\nu}$ with 10% precision. Measurements of time, momentum and direction of incoming beam particles are provided by a beam spectrometer called GigaTracker. The GigaTracker is made of three stations of hybrid silicon pixel detector installed in vacuum ($\sim10^{-6}$ mbar). Each station consists of 18000 pixels of $300\times300\mu m^{2}$ area each, arranged in a matrix of $200\times90$ elements corresponding to a total area of $62.8\times27mm^{2}$. The beam particles, flowing at 750 MHz, are tracked in 4-dimensions by means of time-stamping pixels with the single hit time resolution reaching 115 ps. This performance has to be maintained despite the beam irradiation amounting to a yearly fluence of $4.5\times 10^{14} 1MeV n_{eq}/cm^{2}/200\ days$. In order to limit multiple scattering and beam hadronic interactions, the station material budget is reduced to $0.5\%X_{0}$ by using micro channel cooling (first application in HEP). We will present the detector design and performances during the NA62 data taking periods

The beam and detector of the NA62 experiment at CERN

NA62 is a fixed-target experiment at the CERN SPS dedicated to measurements of rare kaon decays. Such measurements, like the branching fraction of the K(+) → π(+) ν bar nu decay, have the potential to bring significant insights into new physics processes when comparison is made with precise theoretical predictions. For this purpose, innovative techniques have been developed, in particular, in the domain of low-mass tracking devices. Detector construction spanned several years from 2009 to 2014. The collaboration started detector commissioning in 2014 and will collect data until the end of 2018. The beam line and detector components are described together with their early performance obtained from 2014 and 2015 data.NA62 is a fixed-target experiment at the CERN SPS dedicated to measurements of rare kaon decays. Such measurements, like the branching fraction of the $K^{+} \rightarrow \pi^{+} \nu \bar\nu$ decay, have the potential to bring significant insights into new physics processes when comparison is made with precise theoretical predictions. For this purpose, innovative techniques have been developed, in particular, in the domain of low-mass tracking devices. Detector construction spanned several years from 2009 to 2014. The collaboration started detector commissioning in 2014 and will collect data until the end of 2018. The beam line and detector components are described together with their early performance obtained from 2014 and 2015 data